GRENOBLE, France – April 28, 2026 – CEA-Leti will present seven papers and posters on technologies shaping the next decade of advanced heterogenous integration at the Electronic Components and Technology Conference (ECTC) May 26-29 in Orlando, Fla.

These developments cover a variety of technologies, including reducing interconnect pitches through hybrid bonding interconnection, for low-temperature processes, superconducting interconnects and fan-out wafer-level packaging.

Hybrid bonding, which is based on direct copper-to-copper and dielectric-to-dielectric connection technology, enables ultra-fine pitch vertical interconnects. It is emerging as the primary path for high-density 3D integration, as micro-bump approaches reach their scaling limits.

For example, in the paper “Die-To-Wafer Hybrid Bonding Technology down to 1 μm pitch for Multi-Die Stacking Integration" CEA-Leti will present its first demonstration of a die-to-wafer hybrid bonding test vehicle with a pitch as small as 1µm.

Low-temperature processing enables heterogeneous integration in which temperature-sensitive materials (polymers, certain semiconductors) must coexist with standard CMOS processes. The ability to form robust interconnects below typical thermal budgets opens pathways for stacking previously incompatible technologies. The first time successful direct hybrid bonding annealed at ultra-low temperatures down to 100 °C will be presented.

As transistor gate-scaling slows, system-level integration through advanced packaging delivers the performance, power, and form-factor improvements that end-users expect. CEA-Leti's research on hybrid bonding that will be presented at ECTC 2026 reflects growing industry alignment around hybrid bonding as a key enabler of next-generation, high-performance packaging.

Specialized Applications​​

Beyond foundational process development, CEA-Leti researchers will also present application-specific integration advances:

​Papers & Posters